1. Field of Invention
The present invention relates to a current source type voltage slew rate controller to drive capacitive load, and more particularly to a stage by stage delay current-summing slew rate controller.
2. Description of Related Arts
The circuit comprises a current drive and a load, wherein the load may be a capacitor, a parallel of a capacitor and a resistor, or other equivalent load, as shown in FIG. 1.
Slew rate is to measure the changing rate of the voltage on the node. The mathematical expression is ∂V/∂t.
Generally, the slew rate SR=(I(t)−VOUT(t)/R)/C.
I(t) is the transient current of the current source, Vout(t) is the transient voltage of the output node, R and C are the equivalent resistor and capacitor of the output load respectively. If R!=0, the slew rate (SR) will become small with the increasing of the output voltage, which is not good for the signal establishment. Conventionally, there are mainly three ways of slew rate adjustment.
1. Adjust the load;
2. Adjust the input current;
3. Introduce compensation loop.
In prior art No. 1, adjust the load capacitor with the changing of the output voltage, in another word, reduce C to compensate the reduction of I; or
in prior art No. 2, increase I(t) to compensate the shunt of the bypass resistor; or
in prior art No. 3, introduce additional circuit to compensate the bypass current of the resistor.
The drawbacks of the above-mentioned three ways of slew rate adjustment are illustrated as follows.
In prior art No. 1, basically the capacitor-voltage curve is determined by device fabrication, and appears to be none-linear, which means the slew rate is also none-linear and hard to control.
In art No 2, changing the driving current require us to control the base voltage of a bipolar or the gate voltage of a MOSFET. However, such control mechanism is rather complex and prone to be disturbed. Meanwhile, the precision such controlling is highly process dependent.
In art No. 3, introducing compensation feedback loop will solve the problem in art No. 1 and art No. 2. However, in general the bandwidth of a feedback loop can not satisfy the demand of a high speed transmission circuit.